afe79xx

Top-level module for the AFE7901 IC digital interface.

Functionality

Receive Path (RX):

Receives IQ samples from the AFE7901 IC via the JESD core.
Deinterleaves incoming data to restore sample order.
Performs channel multiplexing to align AFE channels with system channels.
Decimates received IQ samples to match system rates.

Transmit Path (TX):

Transmits IQ samples to the AFE7901 IC.
Interleaves data as required by the JESD protocol.
Performs channel multiplexing to map system channels to the AFE7901 channels.
Interpolates data to match the required transmission rate.

Main Block Diagram

The top-level file integrates the following main blocks:

AFE79xx JESD IP Core – Digital JESD interface to the AFE79xx.
TX/RX CDC – Clock-domain crossing for TX/RX paths.
TX/RX Converters – Bus width converters.
Interleaver/Deinterleaver – Sample interleaving and deinterleaving.
TX/RX Channel Multiplexer – Channel reordering and mapping.
Resamplers – Interpolation (TX) and decimation (RX).

AFE79xx JESD IP Core

The Texas Instruments JESD IP core.

Note

This core is external and is not included with the LimeDFB distribution.

TX/RX CDC

Manages Clock Domain Crossing (CDC) between the clock domain used by the JESD core and the main system clock.

TX/RX Converters

Adapts the data bus width, converting between the 128-bit bus used by system modules and the 256-bit bus required by the JESD core.

Interleaver/Deinterleaver

The JESD core operates on interleaved samples. This module performs the necessary interleaving (TX) and deinterleaving (RX) to ensure correct sample ordering.

TX/RX Channel Multiplexer

The physical mapping of JESD/AFE channels does not correspond 1:1 with system/board channels. This multiplexer performs the necessary channel reordering to ensure correct signal routing.

Resamplers

The Resampler module implements configurable upsampling (TX) and downsampling (RX) via a cascade of 2x filters.

Architecture: Cascade of 2x interpolating (HB1) or decimating (HB2d) filters.
Resampling Ratios: Configurable cascade length. A length of 3 (shown below) enables 1x, 2x, 4x, and 8x rates.
Precision: Filters operate on 18-bit I/Q samples, utilizing padding and truncation stages to interface with the 16-bit bus.

Note

The diagram below simplifies the view by showing a single sample path; however, the hardware processes both I and Q channels in parallel.