FLASH

Register Listing for FLASH

Register	Address
FLASH_SPI_CONTROL	0xf0007800
FLASH_SPI_STATUS	0xf0007804
FLASH_SPI_MOSI1	0xf0007808
FLASH_SPI_MOSI0	0xf000780c
FLASH_SPI_MISO1	0xf0007810
FLASH_SPI_MISO0	0xf0007814
FLASH_SPI_CS	0xf0007818
FLASH_SPI_LOOPBACK	0xf000781c

FLASH_SPI_CONTROL

Address: 0xf0007800 + 0x0 = 0xf0007800

SPI Control.

Field	Name	Description
[0]	START	SPI Xfer Start (Write 1 to start Xfer).
[15:8]	LENGTH	SPI Xfer Length (in bits).

FLASH_SPI_STATUS

Address: 0xf0007800 + 0x4 = 0xf0007804

SPI Status.

Field	Name	Description
[0]	DONE	SPI Xfer Done (when read as 1).
[1]	MODE	SPI mode Value Description 0b0 Raw : MOSI transfers aligned on core’s data-width. 0b1 Aligned: MOSI transfers aligned on transfers’ length.

FLASH_SPI_MOSI1

Address: 0xf0007800 + 0x8 = 0xf0007808

Bits 32-39 of FLASH_SPI_MOSI. SPI MOSI data (MSB-first serialization).

FLASH_SPI_MOSI0

Address: 0xf0007800 + 0xc = 0xf000780c

Bits 0-31 of FLASH_SPI_MOSI.

FLASH_SPI_MISO1

Address: 0xf0007800 + 0x10 = 0xf0007810

Bits 32-39 of FLASH_SPI_MISO. SPI MISO data (MSB-first de-serialization).

FLASH_SPI_MISO0

Address: 0xf0007800 + 0x14 = 0xf0007814

Bits 0-31 of FLASH_SPI_MISO.

FLASH_SPI_CS

Address: 0xf0007800 + 0x18 = 0xf0007818

SPI CS Chip-Select and Mode.

Field	Name	Description
[0]	SEL	Value Description 0b0..001 Chip 0 selected for SPI Xfer. 0b1..000 Chip N selected for SPI Xfer.
[16]	MODE	Value Description 0b0 Normal operation (CS handled by Core). 0b1 Manual operation (CS handled by User, direct recopy of sel), useful for Bulk transfers.

FLASH_SPI_LOOPBACK

Address: 0xf0007800 + 0x1c = 0xf000781c

SPI Loopback Mode.

Field	Name	Description
[0]	MODE	Value Description 0b0 Normal operation. 0b1 Loopback operation (MOSI to MISO).