LIMETOP
Register Listing for LIMETOP
Register |
Address |
|---|---|
LIMETOP_GPO |
0xf0002800 |
LIMETOP_FPGACFG_BOARD_ID |
0xf0002804 |
LIMETOP_FPGACFG_MAJOR_REV |
0xf0002808 |
LIMETOP_FPGACFG_COMPILE_REV |
0xf000280c |
LIMETOP_FPGACFG_BOM_HW_VER |
0xf0002810 |
LIMETOP_FPGACFG_PHASE_REG_SEL |
0xf0002814 |
LIMETOP_FPGACFG_DRCT_CLK_EN |
0xf0002818 |
LIMETOP_FPGACFG_LOAD_PHASE |
0xf000281c |
LIMETOP_FPGACFG_CH_EN |
0xf0002820 |
LIMETOP_FPGACFG_REG08 |
0xf0002824 |
LIMETOP_FPGACFG_REG09 |
0xf0002828 |
LIMETOP_FPGACFG_REG10 |
0xf000282c |
LIMETOP_FPGACFG_WFM_CH_EN |
0xf0002830 |
LIMETOP_FPGACFG_REG13 |
0xf0002834 |
LIMETOP_FPGACFG_WFM_SMPL_WIDTH |
0xf0002838 |
LIMETOP_FPGACFG_SYNC_SIZE |
0xf000283c |
LIMETOP_FPGACFG_TXANT_PRE |
0xf0002840 |
LIMETOP_FPGACFG_TXANT_POST |
0xf0002844 |
LIMETOP_FPGACFG_SPI_SS |
0xf0002848 |
LIMETOP_FPGACFG_CLK_ENA |
0xf000284c |
LIMETOP_FPGACFG_SYNC_PULSE_PERIOD |
0xf0002850 |
LIMETOP_PLLCFG_REG01 |
0xf0002854 |
LIMETOP_PLLCFG_PLL_LOCK |
0xf0002858 |
LIMETOP_PLLCFG_REG03 |
0xf000285c |
LIMETOP_PLLCFG_CNT_PHASE |
0xf0002860 |
LIMETOP_PLLCFG_REG05 |
0xf0002864 |
LIMETOP_PLLCFG_REG06 |
0xf0002868 |
LIMETOP_PLLCFG_REG07 |
0xf000286c |
LIMETOP_PLLCFG_N_CNT |
0xf0002870 |
LIMETOP_PLLCFG_M_CNT |
0xf0002874 |
LIMETOP_PLLCFG_C0_CNT |
0xf0002878 |
LIMETOP_PLLCFG_C1_CNT |
0xf000287c |
LIMETOP_PLLCFG_C2_CNT |
0xf0002880 |
LIMETOP_PLLCFG_C3_CNT |
0xf0002884 |
LIMETOP_PLLCFG_C4_CNT |
0xf0002888 |
LIMETOP_PLLCFG_AUTO_PHCFG_SMPLS |
0xf000288c |
LIMETOP_PLLCFG_AUTO_PHCFG_STEP |
0xf0002890 |
LIMETOP_LMS7002_TOP_LMS_CTR_GPIO |
0xf0002894 |
LIMETOP_LMS7002_TOP_LMS1 |
0xf0002898 |
LIMETOP_LMS7002_TOP_REG01 |
0xf000289c |
LIMETOP_LMS7002_TOP_REG03 |
0xf00028a0 |
LIMETOP_TST_TOP_TEST_EN |
0xf00028a4 |
LIMETOP_TST_TOP_TEST_FRC_ERR |
0xf00028a8 |
LIMETOP_TST_TOP_TEST_CMPLT |
0xf00028ac |
LIMETOP_TST_TOP_TEST_REZ |
0xf00028b0 |
LIMETOP_TST_TOP_FX3_CLK_CNT |
0xf00028b4 |
LIMETOP_TST_TOP_LMK_CLK_CNT0 |
0xf00028b8 |
LIMETOP_TST_TOP_LMK_CLK_CNT1 |
0xf00028bc |
LIMETOP_TST_TOP_ADF_CNT |
0xf00028c0 |
LIMETOP_TST_TOP_TX_TST_I |
0xf00028c4 |
LIMETOP_TST_TOP_TX_TST_Q |
0xf00028c8 |
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_OVRD |
0xf00028cc |
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_RD |
0xf00028d0 |
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_DIR |
0xf00028d4 |
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_VAL |
0xf00028d8 |
LIMETOP_GENERAL_PERIPH_PERIPH_INPUT_RD_0 |
0xf00028dc |
LIMETOP_GENERAL_PERIPH_PERIPH_INPUT_RD_1 |
0xf00028e0 |
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_OVRD_0 |
0xf00028e4 |
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_VAL_0 |
0xf00028e8 |
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_OVRD_1 |
0xf00028ec |
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_VAL_1 |
0xf00028f0 |
LIMETOP_GENERAL_PERIPH_FPGA_LED_CTRL |
0xf00028f4 |
LIMETOP_GENERAL_PERIPH_FX3_LED_CTRL |
0xf00028f8 |
LIMETOP_RXTX_TOP_DDR2_1_STATUS |
0xf00028fc |
LIMETOP_RXTX_TOP_DDR2_1_PNF_PER_BIT_L |
0xf0002900 |
LIMETOP_RXTX_TOP_DDR2_1_PNF_PER_BIT_H |
0xf0002904 |
LIMETOP_RXTX_TOP_RX_PATH_PKT_SIZE |
0xf0002908 |
LIMETOP_GPIO |
0xf000290c |
LIMETOP_GPO
Address: 0xf0002800 + 0x0 = 0xf0002800
GPO interface
Field |
Name |
Description |
||||||
|---|---|---|---|---|---|---|---|---|
[0] |
CPU_BUSY |
CPU state.
|
LIMETOP_FPGACFG_BOARD_ID
Address: 0xf0002800 + 0x4 = 0xf0002804
LIMETOP_FPGACFG_MAJOR_REV
Address: 0xf0002800 + 0x8 = 0xf0002808
LIMETOP_FPGACFG_COMPILE_REV
Address: 0xf0002800 + 0xc = 0xf000280c
LIMETOP_FPGACFG_BOM_HW_VER
Address: 0xf0002800 + 0x10 = 0xf0002810
LIMETOP_FPGACFG_PHASE_REG_SEL
Address: 0xf0002800 + 0x14 = 0xf0002814
LIMETOP_FPGACFG_DRCT_CLK_EN
Address: 0xf0002800 + 0x18 = 0xf0002818
LIMETOP_FPGACFG_LOAD_PHASE
Address: 0xf0002800 + 0x1c = 0xf000281c
Field |
Name |
Description |
|---|---|---|
LIMETOP_FPGACFG_CH_EN
Address: 0xf0002800 + 0x20 = 0xf0002820
4b0001 - Channel A, 4b0010 - Channel B enabled, 4b0100 - Channel C enabled, 4b1000 - Channel D enabled,2b1111 - Channels A, B, C, D Enabled
LIMETOP_FPGACFG_REG08
Address: 0xf0002800 + 0x24 = 0xf0002824
Field |
Name |
Description |
|---|---|---|
LIMETOP_FPGACFG_REG09
Address: 0xf0002800 + 0x28 = 0xf0002828
Field |
Name |
Description |
|---|---|---|
LIMETOP_FPGACFG_REG10
Address: 0xf0002800 + 0x2c = 0xf000282c
Field |
Name |
Description |
|---|---|---|
LIMETOP_FPGACFG_WFM_CH_EN
Address: 0xf0002800 + 0x30 = 0xf0002830
LIMETOP_FPGACFG_REG13
Address: 0xf0002800 + 0x34 = 0xf0002834
Field |
Name |
Description |
|---|---|---|
LIMETOP_FPGACFG_WFM_SMPL_WIDTH
Address: 0xf0002800 + 0x38 = 0xf0002838
LIMETOP_FPGACFG_SYNC_SIZE
Address: 0xf0002800 + 0x3c = 0xf000283c
LIMETOP_FPGACFG_TXANT_PRE
Address: 0xf0002800 + 0x40 = 0xf0002840
LIMETOP_FPGACFG_TXANT_POST
Address: 0xf0002800 + 0x44 = 0xf0002844
LIMETOP_FPGACFG_SPI_SS
Address: 0xf0002800 + 0x48 = 0xf0002848
LIMETOP_FPGACFG_CLK_ENA
Address: 0xf0002800 + 0x4c = 0xf000284c
LIMETOP_FPGACFG_SYNC_PULSE_PERIOD
Address: 0xf0002800 + 0x50 = 0xf0002850
LIMETOP_PLLCFG_REG01
Address: 0xf0002800 + 0x54 = 0xf0002854
LIMETOP_PLLCFG_PLL_LOCK
Address: 0xf0002800 + 0x58 = 0xf0002858
LIMETOP_PLLCFG_REG03
Address: 0xf0002800 + 0x5c = 0xf000285c
Field |
Name |
Description |
|---|---|---|
LIMETOP_PLLCFG_CNT_PHASE
Address: 0xf0002800 + 0x60 = 0xf0002860
LIMETOP_PLLCFG_REG05
Address: 0xf0002800 + 0x64 = 0xf0002864
Field |
Name |
Description |
|---|---|---|
LIMETOP_PLLCFG_REG06
Address: 0xf0002800 + 0x68 = 0xf0002868
Field |
Name |
Description |
|---|---|---|
LIMETOP_PLLCFG_REG07
Address: 0xf0002800 + 0x6c = 0xf000286c
Field |
Name |
Description |
|---|---|---|
LIMETOP_PLLCFG_N_CNT
Address: 0xf0002800 + 0x70 = 0xf0002870
LIMETOP_PLLCFG_M_CNT
Address: 0xf0002800 + 0x74 = 0xf0002874
LIMETOP_PLLCFG_C0_CNT
Address: 0xf0002800 + 0x78 = 0xf0002878
LIMETOP_PLLCFG_C1_CNT
Address: 0xf0002800 + 0x7c = 0xf000287c
LIMETOP_PLLCFG_C2_CNT
Address: 0xf0002800 + 0x80 = 0xf0002880
LIMETOP_PLLCFG_C3_CNT
Address: 0xf0002800 + 0x84 = 0xf0002884
LIMETOP_PLLCFG_C4_CNT
Address: 0xf0002800 + 0x88 = 0xf0002888
LIMETOP_PLLCFG_AUTO_PHCFG_SMPLS
Address: 0xf0002800 + 0x8c = 0xf000288c
LIMETOP_PLLCFG_AUTO_PHCFG_STEP
Address: 0xf0002800 + 0x90 = 0xf0002890
LIMETOP_LMS7002_TOP_LMS_CTR_GPIO
Address: 0xf0002800 + 0x94 = 0xf0002894
LMS Control GPIOs.
LIMETOP_LMS7002_TOP_LMS1
Address: 0xf0002800 + 0x98 = 0xf0002898
Field |
Name |
Description |
|---|---|---|
LIMETOP_LMS7002_TOP_REG01
Address: 0xf0002800 + 0x9c = 0xf000289c
LIMETOP_LMS7002_TOP_REG03
Address: 0xf0002800 + 0xa0 = 0xf00028a0
Field |
Name |
Description |
|---|---|---|
LIMETOP_TST_TOP_TEST_EN
Address: 0xf0002800 + 0xa4 = 0xf00028a4
Field |
Name |
Description |
|---|---|---|
LIMETOP_TST_TOP_TEST_FRC_ERR
Address: 0xf0002800 + 0xa8 = 0xf00028a8
Field |
Name |
Description |
|---|---|---|
LIMETOP_TST_TOP_TEST_CMPLT
Address: 0xf0002800 + 0xac = 0xf00028ac
LIMETOP_TST_TOP_TEST_REZ
Address: 0xf0002800 + 0xb0 = 0xf00028b0
LIMETOP_TST_TOP_FX3_CLK_CNT
Address: 0xf0002800 + 0xb4 = 0xf00028b4
LIMETOP_TST_TOP_LMK_CLK_CNT0
Address: 0xf0002800 + 0xb8 = 0xf00028b8
LIMETOP_TST_TOP_LMK_CLK_CNT1
Address: 0xf0002800 + 0xbc = 0xf00028bc
LIMETOP_TST_TOP_ADF_CNT
Address: 0xf0002800 + 0xc0 = 0xf00028c0
LIMETOP_TST_TOP_TX_TST_I
Address: 0xf0002800 + 0xc4 = 0xf00028c4
LIMETOP_TST_TOP_TX_TST_Q
Address: 0xf0002800 + 0xc8 = 0xf00028c8
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_OVRD
Address: 0xf0002800 + 0xcc = 0xf00028cc
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_RD
Address: 0xf0002800 + 0xd0 = 0xf00028d0
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_DIR
Address: 0xf0002800 + 0xd4 = 0xf00028d4
LIMETOP_GENERAL_PERIPH_BOARD_GPIO_VAL
Address: 0xf0002800 + 0xd8 = 0xf00028d8
LIMETOP_GENERAL_PERIPH_PERIPH_INPUT_RD_0
Address: 0xf0002800 + 0xdc = 0xf00028dc
LIMETOP_GENERAL_PERIPH_PERIPH_INPUT_RD_1
Address: 0xf0002800 + 0xe0 = 0xf00028e0
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_OVRD_0
Address: 0xf0002800 + 0xe4 = 0xf00028e4
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_VAL_0
Address: 0xf0002800 + 0xe8 = 0xf00028e8
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_OVRD_1
Address: 0xf0002800 + 0xec = 0xf00028ec
LIMETOP_GENERAL_PERIPH_PERIPH_OUTPUT_VAL_1
Address: 0xf0002800 + 0xf0 = 0xf00028f0
LIMETOP_GENERAL_PERIPH_FPGA_LED_CTRL
Address: 0xf0002800 + 0xf4 = 0xf00028f4
Field |
Name |
Description |
|---|---|---|
LIMETOP_GENERAL_PERIPH_FX3_LED_CTRL
Address: 0xf0002800 + 0xf8 = 0xf00028f8
LIMETOP_RXTX_TOP_DDR2_1_STATUS
Address: 0xf0002800 + 0xfc = 0xf00028fc
LIMETOP_RXTX_TOP_DDR2_1_PNF_PER_BIT_L
Address: 0xf0002800 + 0x100 = 0xf0002900
LIMETOP_RXTX_TOP_DDR2_1_PNF_PER_BIT_H
Address: 0xf0002800 + 0x104 = 0xf0002904
LIMETOP_RXTX_TOP_RX_PATH_PKT_SIZE
Address: 0xf0002800 + 0x108 = 0xf0002908
Packet Size in bytes,
LIMETOP_GPIO
Address: 0xf0002800 + 0x10c = 0xf000290c