SPIFLASH

Register Listing for SPIFLASH

Register	Address
SPIFLASH_PHY_CLK_DIVISOR	0xf0003000
SPIFLASH_MMAP_DUMMY_BITS	0xf0003004
SPIFLASH_MASTER_CS	0xf0003008
SPIFLASH_MASTER_PHYCONFIG	0xf000300c
SPIFLASH_MASTER_RXTX	0xf0003010
SPIFLASH_MASTER_STATUS	0xf0003014

SPIFLASH_PHY_CLK_DIVISOR

Address: 0xf0003000 + 0x0 = 0xf0003000

SPIFLASH_MMAP_DUMMY_BITS

Address: 0xf0003000 + 0x4 = 0xf0003004

SPIFLASH_MASTER_CS

Address: 0xf0003000 + 0x8 = 0xf0003008

SPIFLASH_MASTER_PHYCONFIG

Address: 0xf0003000 + 0xc = 0xf000300c

SPI PHY settings.

Field	Name	Description
[7:0]	LEN	SPI Xfer length (in bits).
[11:8]	WIDTH	SPI Xfer width (1/2/4/8).
[23:16]	MASK	SPI DQ output enable mask (set bits to 1 to enable output drivers on DQ lines).

SPIFLASH_MASTER_RXTX

Address: 0xf0003000 + 0x10 = 0xf0003010

SPIFLASH_MASTER_STATUS

Address: 0xf0003000 + 0x14 = 0xf0003014

Field	Name	Description
[0]	TX_READY	TX FIFO is not full.
[1]	RX_READY	RX FIFO is not empty.