SPIMASTER

Register Listing for SPIMASTER

Register	Address
SPIMASTER_CONTROL	0xf0003800
SPIMASTER_STATUS	0xf0003804
SPIMASTER_MOSI	0xf0003808
SPIMASTER_MISO	0xf000380c
SPIMASTER_CS	0xf0003810
SPIMASTER_LOOPBACK	0xf0003814
SPIMASTER_CLK_DIVIDER	0xf0003818

SPIMASTER_CONTROL

Address: 0xf0003800 + 0x0 = 0xf0003800

SPI Control.

Field	Name	Description
[0]	START	SPI Xfer Start (Write 1 to start Xfer).
[15:8]	LENGTH	SPI Xfer Length (in bits).

SPIMASTER_STATUS

Address: 0xf0003800 + 0x4 = 0xf0003804

SPI Status.

Field	Name	Description
[0]	DONE	SPI Xfer Done (when read as 1).
[1]	MODE	SPI mode Value Description 0b0 Raw : MOSI transfers aligned on core’s data-width. 0b1 Aligned: MOSI transfers aligned on transfers’ length.

SPIMASTER_MOSI

Address: 0xf0003800 + 0x8 = 0xf0003808

SPI MOSI data (MSB-first serialization).

SPIMASTER_MISO

Address: 0xf0003800 + 0xc = 0xf000380c

SPI MISO data (MSB-first de-serialization).

SPIMASTER_CS

Address: 0xf0003800 + 0x10 = 0xf0003810

SPI CS Chip-Select and Mode.

Field	Name	Description
[1:0]	SEL	Value Description 0b0..001 Chip 0 selected for SPI Xfer. 0b1..000 Chip N selected for SPI Xfer.
[16]	MODE	Value Description 0b0 Normal operation (CS handled by Core). 0b1 Manual operation (CS handled by User, direct recopy of sel), useful for Bulk transfers.

SPIMASTER_LOOPBACK

Address: 0xf0003800 + 0x14 = 0xf0003814

SPI Loopback Mode.

Field	Name	Description
[0]	MODE	Value Description 0b0 Normal operation. 0b1 Loopback operation (MOSI to MISO).

SPIMASTER_CLK_DIVIDER

Address: 0xf0003800 + 0x18 = 0xf0003818

SPI Clk Divider.